module cla4 (A,B,Cin,S,pg,gg);

    input   [3:0]   A,B;
    input           Cin;
    output  [3:0]   S;
    output          pg,gg;

    wire    [3:0]   G = A & B;
    wire    [3:0]   P = A | B;
    wire            c1,c2,c3,c4; 

    assign  c1 = G[0] | P[0]&Cin;
    assign  c2 = G[1] | P[1]&c1;
    assign  c3 = G[2] | P[2]&c2;
    assign  c4 = G[3] | P[3]&c3;


    fa1     U0      (.A(A[0]),.B(B[0]),.Cin(Cin), .S(S[0]),.Cout(c1));
    fa1     U1      (.A(A[1]),.B(B[1]),.Cin(c1),.S(S[1]),.Cout(c2));
    fa1     U2      (.A(A[2]),.B(B[2]),.Cin(c2),.S(S[2]),.Cout(c3));
    fa1     U3      (.A(A[3]),.B(B[3]),.Cin(c3),.S(S[3]),.Cout(c4));

    assign  pg = & P;
    assign  gg = G[3] | P[3]&G[2] | P[3]&P[2]&G[1] | P[3]&P[2]&P[1]&G[0];

endmodule
